Fan-out semiconductor package

A fan-out semiconductor package, comprising:

• a frame, including a wiring layer, and having a through-hole;
• a semiconductor chip disposed in the through-hole, and having an active surface on which a connection pad is disposed and an inactive surface opposite to the active surface;
• an encapsulant covering at least a portion of each of the frame and the inactive surface of the semiconductor chip, and having a first opening exposing at least a portion of the wiring layer;
• an insulating layer disposed on the encapsulant, and having a second opening formed in the first opening to expose at least a portion of the wiring layer;
• a conductive pattern layer disposed on the insulating layer;
• a conductive via disposed in the second opening, and electrically connecting the wiring layer to the conductive pattern layer;
• and
• a connection structure disposed on the frame and the active surface of the semiconductor chip, and including one or more redistribution layers,
• wherein the conductive pattern layer and the redistribution layer are electrically connected to the connection pad.