Semiconductor device and nonvolatile memory

A nonvolatile memory comprising:

• a memory cell array arranged above a substrate;
• and
• a peripheral circuit arranged between the substrate and the memory cell array,
• wherein the peripheral circuit includes:
• a transistor having a diffusion layer extending along a surface of the substrate and a gate electrode arranged above the diffusion layer;
• and
• contacts having elongated bottom surfaces connected to the diffusion layer on both sides of the gate electrode, the contacts being arranged so that the bottom surfaces of the contacts are not aligned in a straight line with an extension direction of the diffusion layer, and
• wherein the memory cell array includes:
• a plurality of word lines stacked in a direction perpendicular to the surface of the substrate;
• and
• a plurality of pillars penetrating the plurality of word lines in the direction perpendicular to the surface of the substrate, each memory cell being formed at each of intersections of the plurality of word lines and the plurality of pillars.