Minimize middle-of-line contact line shorts
AssigneeInternational Business Machines Corporation
InventorsInjo Ok, Balasubramanian Pranatharthiharan, Soon-Cheon Seo, Charan V. Surisetty
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AssigneeInternational Business Machines Corporation
InventorsInjo Ok, Balasubramanian Pranatharthiharan, Soon-Cheon Seo, Charan V. Surisetty
Estimating the term…
Semiconductor structures and methods of forming such structures are disclosed. In an embodiment, the semiconductor structure comprises a substrate, a dielectric layer, and a plurality of gates, including a first gate and a pair of adjacent gates. The method comprises forming gate caps on the adjacent gates, including etching portions of the gate electrodes in the adjacent gates to recess the gate electrodes therein, and forming the caps above the recessed gate electrodes. Conductive metal trenches are formed in the dielectric layer, on the sides of the first gate; and after forming the trenches, a contact is formed over the gate electrode of the first gate and over and on one of the conductive trenches. In embodiments, the contact is a gate contact, and in other embodiments, the contact is a non-gate contact.
A method of fabricating a semiconductor structure comprising a semiconductor substrate, a dielectric layer on the substrate, and a plurality of gates located within the dielectric layer, above the substrate, the plurality of gates including a first gate and a pair of adjacent gates on sides of the first gate, and each of the gates including a gate electrode, the method comprising:
A semiconductor structure comprising:
A method of fabricating a semiconductor structure comprising a semiconductor substrate, a dielectric layer on the substrate, and a plurality of gates located within the dielectric layer, above the substrate, the plurality of gates including a first gate and a pair of adjacent gates on sides of the first gate, and each of the gates including a gate electrode, the method comprising:
Dependencies are inferred from the claim text.