Method and system of forming integrated circuit
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsKA FAI CHANG, FONG-YUAN CHANG, CHIN-CHOU LIU, YI-KAN CHENG
Life of this patent
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Abstract
A method for forming an integrated circuit (IC) is provided. The method includes the following operations. A circuit layout including a first load region and a second load region is received. A full power network of the circuit layout is obtained. The full power network is transformed into a first power network according to the first load region. A first power simulation is performed upon the first power network. The full power network is transformed into a second power network according to the second load region. A second power simulation is performed upon the second power network. The IC is fabricated according to the circuit layout.
Claims21
A method for forming an integrated circuit (IC), the method comprising:
- receiving a circuit layout including a first load region and a second load region;
- obtaining a full power network of the circuit layout;
- transforming the full power network into a first power network according to the first load region;
- performing a first power simulation upon the first power network;
- transforming the full power network into a second power network according to the second load region;
- performing a second power simulation upon the second power network;
- and
- fabricating the IC according to the circuit layout.
A method for forming an integrated circuit (IC), the method comprising:
- receiving a first circuit layout and a second circuit layout over the first circuit layout;
- obtaining a first sub-power network and a second sub-power network of the first circuit layout and the second circuit layout, respectively, wherein the first sub-power network is coupled to the second sub-power network through a first path and a second path;
- obtaining conductivity information of the first path and the second path;
- performing a power simulation upon the first sub-power network, the second sub-power network, and at least one of the first path and the second path based on the conductivity information;
- and
- fabricating the IC according to the first circuit layout and the second circuit layout.
17-20. (canceled)
A method for forming an integrated circuit (IC), the method comprising:
- receiving a first circuit layout and a second circuit layout over the first circuit layout;
- obtaining a first sub-power network and a second sub-power network of the first circuit layout and the second circuit layout, respectively;
- transforming the first sub-power network and the second sub-power network into a first power network;
- performing a first power simulation upon the first power network;
- transforming the first sub-power network and the second sub-power network into a second power network different from the first power network;
- performing a second power simulation upon the second power network;
- and
- fabricating the IC according to the first circuit layout and the second circuit layout.
Dependencies are inferred from the claim text.