One time programmable (otp) bit cell with integrated inhibit device

A one-time programmable (OTP) memory bit circuit, comprising:

• an anti-fuse FinFET having a first terminal for receiving a programming voltage and a second terminal, the anti-fuse FinFET located in a first region of an integrated circuit;
• an access FinFET configured to selectively couple one of a program inhibit voltage and a program enable voltage to the second terminal of a corresponding anti-fuse FinFET in a programming operation, the access FinFET located in a second region of the integrated circuit, different than the first region of the integrated circuit;
• and
• an interconnect coupling the second terminal of the anti-fuse FinFET to a drain terminal of the access FinFET, wherein the interconnect overlaps with at least a second access FinFET of a second OTP memory bit circuit.

A method for operating a one-time programmable memory, comprising:

• applying a programming voltage to a first terminal of an anti-fuse fin field-effect transistor (FinFET), the anti-fuse FinFET located in a first region of an integrated circuit having an array of anti-fuse FinFETs;
• applying one of a program inhibit voltage and a program enable voltage to a first terminal of an access FinFET, the access FinFET having a second terminal coupled to a second terminal of the anti-fuse FinFET, the access FinFET located in a second region of the integrated circuit having an array of access FinFETs, different than the first region of the integrated circuit;
• applying a first supply voltage to a gate of the access FinFET to activate the access FinFET;
• responsive to the access FinFET being active, providing the voltage applied to the first terminal of the access FinFET to the second terminal of the anti-fuse FinFET;
• and
• responsive to providing the program enable voltage to the second terminal of the anti-fuse FinFET, programming the anti-fuse FinFET.