Memory device and method of operating the same
AssigneeSK hynix Inc.
InventorJu Hyeon HAN
Life of this patent
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Abstract
Provided herein may be a memory device and a method of operating the same. The memory device may include: a memory block including a plurality of select transistors; a peripheral circuit configured to perform a program operation and a read operation on the memory block; and control logic configured to control the peripheral circuits to perform the program operation and the read operation, and to adjust and set a potential level of a select transistor operating voltage to be applied to the plurality of select transistors based on a threshold voltage monitoring to operation on the plurality of select transistors.
Claims20
A memory device comprising:
- a memory block including a plurality of select transistors;
- a peripheral circuit configured to perform a program operation and a read operation on the memory block;
- and
- control logic configured to control the peripheral circuit to perform the program operation and the read operation, and to adjust and set a potential level of a select transistor operating voltage to be applied to the plurality of select transistors based on a threshold voltage monitoring operation on the plurality of select transistors.
A memory device comprising:
- a memory block including a plurality of select transistors;
- a peripheral circuit configured to perform a threshold voltage monitoring operation on the plurality of select transistors;
- and
- a control logic configured to control the peripheral circuit, and to reduce a select transistor operating voltage to be applied to the plurality of select transistors when a number of first select transistors in a lower threshold voltage distribution among the plurality of select transistors falls within a first setting range as a result of the threshold voltage monitoring operation, and increase the select transistor operation voltage when a number of second select transistors in an upper threshold voltage distribution among the plurality of select transistors falls within a second setting range.
A method of operating a memory device comprising:
- performing a first read operation using a first read voltage on a plurality of select transistors in a memory block;
- determining a number of first select transistors in a lower threshold voltage distribution area less than the first read voltage among the plurality of select transistors based on data read as a result of the first read operation;
- and
- reducing a potential level of a select transistor operating voltage to be applied to the plurality of select transistors when the number of first select transistors fails within a first setting range.
Dependencies are inferred from the claim text.