Calibration of open blocks in nand flash memory
AssigneeInternational Business Machines Corporation
InventorsNikolaos Papandreou, Roman A. Pletka, Sasa Tomic, Nikolas Ioannou, Charalampos Pozidis, Aaron D. Fry, Timothy Fisher
Life of this patent
Estimating the term…
Abstract
Performing a calibration of a NAND flash memory block that is in an open state. An open state of the NAND flash memory block is detected, the NAND flash memory block comprising a plurality of memory pages, each of which comprising a plurality of memory cells. A group of pages of the NAND flash memory block being in an open state having comparable characteristics is identified. A calibration of read voltage values to pages of the group of identified pages is performed.
Claims22
(canceled)
The method according to claim 10, wherein said calibration is a delta calibration reflecting temporary changes in said programmed threshold voltage distributions only.
The method according to claim 10, wherein calibrating pages of said identified group of page is done using a delta calibration based on said block state information indicating said page group being affected by temporary changes in said programmed threshold voltage distributions, and wherein calibrating pages of said identified page group is done using a base calibration based on said block state information indicating said page group not being affected by temporary changes in said programmed threshold voltage distributions.
The method according to claim 10, further comprising determining a time said NAND flash memory block has remained in an open state.
(canceled)
A computer-implemented method of performing a calibration of a NAND flash memory block, said method comprising:
- detecting an open state of said NAND flash memory block, said NAND flash memory block comprising a plurality of memory pages, each of which comprising a plurality of memory cells;
- identifying a group of memory pages of said NAND flash memory block being in an open state having comparable characteristics;
- and
- performing a calibration of read voltage values to pages of said group of identified pages,
- wherein said NAND flash memory block in said open state comprises, besides non-programmed memory pages, memory pages that are flushed memory pages,
- wherein any flushed pages of said NAND flash memory block are excluded from said calibration.
A memory controller for performing a calibration of a NAND flash memory block that is in an open state, said memory controller comprising:
- a detection unit adapted for detecting an open state of said NAND flash memory block, said NAND flash memory block comprising a plurality of memory pages, each of which comprising a plurality of memory cells;
- an identification unit adapted for identifying a group of pages of said NAND flash memory block being in an open state having comparable characteristics;
- and
- a calibration unit adapted for performing a calibration of read voltage values to pages of said group of identified pages,
- wherein said NAND flash memory block in said open state comprises non-programmed memory pages and memory pages that are flushed memory pages, and wherein any flushed pages of said NAND flash memory block are excluded from said calibration.
A computer program product for performing a calibration of a NAND flash memory block that is in an open state, said computer program product comprising a computer readable storage medium having program instructions embodied therewith, said program instructions being executable by one or more computing systems or controllers to cause said one or more computing systems to at least:
- detect an open state of said NAND flash memory block, said NAND flash memory block comprising a plurality of memory pages, each of which comprising a plurality of memory cells;
- identify a group of pages of said NAND flash memory block being in an open state having comparable characteristics, and
- perform a calibration of read voltage values to pages of said group of identified pages wherein said NAND flash memory block in said open state comprises non-programmed memory pages and memory pages that are flushed memory pages wherein any flushed pages of said NAND flash memory block are excluded from said calibration.
Dependencies are inferred from the claim text.