US 2020/0051620 A1 · MEMORY DEVICE AND PROGRAMMING METHOD THEREOF

Abstract

Provided is a programming method for a memory device including a memory array and a controller. The programming method including: controlling programming on a first page of a first word line by the controller; controlling programming on a first page of a second word line by the controller, the second word line being adjacent to the first word line; controlling for performing a first programming operation on a second page of the first word line by the controller; controlling programming on a first page of a third word line by the controller, the third word line being adjacent to the second word line; controlling for performing the first programming operation on a second page of the second word line by the controller; and controlling for performing a second programming operation on the second page of the first word line by the controller.

Claims12

Dependent claims

A programming method for a memory device including a memory array and a controller, the memory array including a plurality of memory cells, the programming method comprising:

controlling programming on a first page of a first word line of the memory array by the controller;
controlling programming on a first page of a second word line of the memory array by the controller, the second word line being adjacent to the first word line;
controlling for performing a first programming operation on a second page of the first word line of the memory array by the controller;
controlling programming on a first page of a third word line of the memory array by the controller, the third word line being adjacent to the second word line;
controlling for performing the first programming operation on a second page of the second word line of the memory array by the controller;
and
controlling for performing a second programming operation on the second page of the first word line of the memory array by the controller.

4 more elements

A memory device comprising:

a memory array including a plurality of memory cells;
and
a controller coupled to the memory array, the controller being configured to control:
programming a first page of a first word line of the memory array;
programming a first page of a second word line of the memory array, the second word line being adjacent to the first word line;
performing a first programming operation on a second page of the first word line;
programming a first page of a third word line of the memory array,
the third word line being adjacent to the second word line;
performing the first programming operation on a second page of the second word line of the memory array;
and
performing a second programming operation on the second page of the first word line of the memory array.

8 more elements

Dependencies are inferred from the claim text.

Memory device and programming method thereof

Life of this patent

Memory device and programming method thereof

Life of this patent

Abstract

Claims12