Semiconductor storage circuit, semiconductor storage apparatus, and data detection method
AssigneeSocionext Inc.
InventorYoshinobu YAMAGAMI
Life of this patent
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Abstract
A semiconductor storage circuit has: a plurality of first memory cells and a first precharge transistor connected to a first local read bit line; and a plurality of second memory cells and a second precharge transistor connected to a second local read bit line. A signal responsive to signals output to the first and second local read bit lines is output to a global read bit line via a gate circuit and an output circuit. A first transistor having a gate connected to the output of the gate circuit is provided between the first and second local read bit lines.
Claims10
A semiconductor storage circuit, comprising:
- a first local block including a plurality of first memory cells connected to a first local read bit line and a first precharge transistor of a first conductivity type connected between the first local read bit line and a first power supply;
- a second local block including a plurality of second memory cells connected to a second local read bit line and a second precharge transistor of the first conductivity type connected between the second local read bit line and the first power supply;
- a gate circuit configured to output a signal responsive to signals output to the first local read bit line and the second local read bit line;
- an output circuit configured to output a signal responsive to the output of the gate circuit to a global read bit line;
- and
- a first transistor of the first conductivity type provided between the first local read bit line and the second local read bit line, a gate of the first transistor being connected to the output of the gate circuit,
- wherein
- when the first precharge transistor is turned off and the first transistor is turned on, the first local read bit line is held at the level of the first power supply through only a conduction path formed of a series circuit of the second precharge transistor and the first transistor.
A data detection method of detecting data in a semiconductor storage circuit, comprising the steps of:
- precharging first and second local read bit lines to each of which a plurality of memory cells are connected;
- bringing a first transistor provided between the first local read bit line and the second local read bit line into conduction;
- clearing the precharge of one local read bit line, out of the first local read bit line and the second local read bit line, to which a first memory cell that is an object to be read, among the plurality of memory cells, is connected;
- holding the one local read bit line at a potential level of the precharge with only a conduction path from the other local read bit line through the first transistor, reading the state of the first memory cell to the one local read bit line, and shutting off the conduction of the first transistor according to the read state of the first memory cell;
- and
- outputting a signal responsive to the read state of the first memory cell to a global read bit line.
Dependencies are inferred from the claim text.