Integrated Assemblies Comprising Vertically-Stacked Memory Array Decks and Folded Digit Line Connections

An integrated assembly, comprising:

• a base comprising a first sense-amplifier-circuitry and a second sense-amplifier-circuitry, with the second sense-amplifier-circuitry being laterally displaced from the first sense-amplifier-circuitry;
• a first deck over the base and comprising a first array of first memory cells;
• a second deck over the first deck and comprising a second array of second memory cells;
• first digit lines associated with the first array, the first digit lines alternating between even first digit lines and odd first digit lines;
• second digit lines associated with the second array, the second digit lines alternating between even second digit lines and odd second digit lines;
• individual of the even first digit lines being comparatively coupled with individual of the even second digit lines through the first sense-amplifier-circuitry;
• and
• individual of the odd first digit lines being comparatively coupled with individual of the odd second digit lines through the second sense-amplifier-circuitry.

An integrated assembly, comprising:

• a first sense-amplifier-circuitry laterally displaced relative to a second sense-amplifier-circuitry;
• first digit lines vertically displaced relative to the first and second sense-amplifier-circuitries and extending along a first memory array;
• the first digit lines being laterally displaced relative to one another and alternating between even first digit lines and odd first digit lines;
• second digit lines vertically displaced relative to the first and second sense-amplifier-circuitries, vertically displaced relative the first digit lines, and extending along a second memory array;
• the second digit lines being laterally displaced relative to one another and alternating between even second digit lines and odd second digit lines;
• individual of the even first digit lines being comparatively coupled with individual of the even second digit lines through the first sense-amplifier-circuitry;
• individual of the odd first digit lines being comparatively coupled with individual of the odd second digit lines through the second sense-amplifier-circuitry;
• a first set of first wordlines extending along the first memory array;
• a second set of second wordlines extending along the second memory array;
• the first wordlines being coupled with first wordline-driver-circuitry;
• and
• the second wordlines being coupled with second wordline-driver-circuitry.