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US 2020/0051611 A1Published application
Sub word line driver of semiconductor memory device
AssigneeSK hynix Inc.
InventorJae Hong JEONG
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Abstract
A layout structure of a sub word line driver for use in a semiconductor memory device may be disclosed. The sub word line driver may include a first active region through which first and second main word lines pass. The sub word line driver may include first gates arranged in the first active region, and configured to receive word line selection signals.
Claims7
A sub word line driver of a semiconductor memory device comprising:
- a first active region through which first and second main word lines extending in a first direction pass;
- a second active region disposed adjacent to the first active region in the first direction, and formed to allow the first and second main word lines to pass therethrough;
- first gates arranged in the first active region disposed between the first main word line and the second main word line, and configured to receive first word line selection signals;
- and
- second gates arranged in outside ends of the first and second main word lines in the second active region, and configured to receive second word line selection signals,
- wherein each of the first and second gates is formed to have a substantially square shape.
3 more elements
Dependencies are inferred from the claim text.