Systems and methods for dynamic random access memory (dram) cell voltage boosting

A memory device, comprising:

• a memory array having at least one memory cell;
• a sense amplifier circuit configured to read data from the at least one memory cell, write data to the at least one memory cell, or a combination thereof;
• a first bus configured to provide a first electric power to the sense amplifier circuit;
• a second bus configured to provide a second electric power to a second circuit, wherein the first bus and the second bus are configured to be electrically coupled to each other to provide for the first electric power and the second electric power to the at least one memory cell;
• and
• a global wordline circuit, wherein the global wordline circuit is configured to electrically couple the first bus with the second bus after receipt of a precharge (PRE) command to provide for the first electric power and the second electric power to the at least one memory cell.