Electronic device comprising storage devices transmitting reference clock via cascade coupling structure

An embedded storage device comprising:

• a nonvolatile memory;
• a controller configured to control the nonvolatile memory;
• a clock input port configured to receive a first reference clock signal and transmit the first reference clock signal to the controller;
• and
• a clock output port configured to output a second reference clock signal provided from the controller,
• wherein the controller bypasses the first reference clock signal provided from the clock input port to the clock output port or transmits the second reference clock signal to the clock output port after tuning the first reference clock signal.

An electronic device comprising:

• a first storage device receiving a first reference clock signal through a first clock signal input port, and outputting a second reference clock signal to a first clock output port, wherein the first storage device includes,
• a first controller configured to receive the first reference clock signal and first data from the first clock input port and output the second reference clock signal to the first clock output port, and
• a first nonvolatile memory storing the first data from the first controller;
• and
• a second storage device receiving the second reference clock signal output from the first clock output port, wherein the second storage device includes,
• a second clock input port configured to receive the second reference clock signal, and
• a second controller receiving the second reference clock signal from the second clock input port and second data;
• and
• a second nonvolatile memory storing the second data from the second controller,
• wherein the first storage device communicates with an operation processor supplying the first data and the first reference clock signal by using the first reference clock signal, and
• wherein the second storage device communicates with the first storage device by using the second reference clock signal.