Input/output circuit, memory device having the same, and operating method thereof
AssigneeSK hynix Inc.
InventorJin Ha HWANG
Life of this patent
Estimating the term…
Abstract
An input/output circuit for use in a memory includes: a data pattern detector for outputting an up resistance control code and a down resistance control code according to whether the pattern of consecutively input data is a consecutively varied pattern or an inconsecutively varied pattern; and an output circuit for controlling resistance in response to the up resistance control code and the down resistance control code, and amplifying the data and then outputting the amplified data to an input/output pad.
Claims20
An input/output circuit comprising:
- a data pattern detector configured to output an up resistance control code and a down resistance control code according to whether input data has a consecutively varied pattern or an inconsecutively varied pattern;
- and
- an output circuit configured to have resistance controlled in response to the up resistance control code and the down resistance control code, amplify the input data, and output the amplified data to an input/output pad.
A memory device comprising:
- a memory cell array configured to store data;
- and
- a peripheral circuit configured to store data received from a memory controller in the memory cell array in a program operation, read data stored in the memory cell array in a read operation, and output the read data to the memory controller,
- wherein the peripheral circuit includes an input/output circuit configured to output the read data to the memory controller through an input/output pad by controlling internal resistance according to a pattern of the read data.
A method for operating a memory device, the method comprising:
- reading memory cells;
- outputting an up resistance control code and a down resistance control code according to a pattern of data read from the memory cells;
- outputting a pull-up pulse or a pull-down pulse according to the read data;
- and
- setting resistance according to the up resistance control code and the down resistance control code, and outputting a first pull-up code or a first pull-down code in response to the pull-up pulse or the pull-down pulse.
An input/output circuit comprising:
- a data pad;
- a data pattern detector activated in response to a data output operation through the data pad to detect a pattern of bits in a sequence of output data and generating a resistance control code based on the detected pattern of bits in the sequence;
- and
- an output circuit including a driver having a resistance that is controlled based on the resistance control code, the output circuit suitable for receiving the output data and driving the data pad to output data in accordance with the controlled resistance of the driver,
- wherein the resistance of the driver is controlled to have a first resistance when all of the bits of the sequence have the same value, a second resistance when a sub-sequence of bits, but not all bits, of the sequence have the same value, and a third resistance when no consecutive bits in the sequence have the same value.
Dependencies are inferred from the claim text.