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US 2020/0051599 A1Published application
Memory power coordination
AssigneeMicron Technology, Inc.
InventorsKelley D. Dobelstein, Jason T. Zawodny, Kyle B. Wheeler
Life of this patent
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Abstract
The present disclosure includes apparatuses and methods related to bank coordination in a memory device. A number of embodiments include a method comprising concurrently performing a memory operation by a threshold number of memory regions, and executing a command to cause a budget area to perform a power budget operation associated with the memory operation.
Claims21
1-20. (canceled)
A method of operating a memory device, comprising:
- selecting a number of memory regions among a plurality of memory regions to perform a respective processing in memory (PIM) operation, wherein the number of selected memory regions is less than a total number of the plurality of memory regions;
- and
- performing the respective PIM operation on each of the selected memory regions, wherein the number of memory regions selected is controlled by a bank arbiter coupled to the plurality of memory regions.
An apparatus, comprising:
- a memory comprising a plurality of memory regions each comprising memory cells;
- and
- a controller coupled to the memory and the power budget register, wherein the controller is configured to:
- cause selection of a number of memory regions among the plurality of memory regions to perform a respective processing in memory (PIM) operation, wherein the number of selected memory regions is less than a total number of the plurality of memory regions;
- and
- cause the respective PIM operation to be performed on each of the selected memory regions.
3 more elements
A system, comprising:
- a host;
- a memory coupled to the host and comprising a plurality of memory regions;
- a power budget register coupled to the memory;
- and
- a controller coupled to the memory and the power budget register, wherein the controller is configured to:
- set a counter having a value corresponding to a threshold number of memory regions allowed to perform a respective processing in memory (PIM) operation;
- cause selection of a number of memory regions among the plurality of memory regions to perform a respective processing in memory (PIM) operation, wherein the number of selected memory regions is less than or equal to the threshold number of memory regions allowed to perform the respective PIM operation;
- cause the respective PIM operation to be performed on each of the selected memory regions;
- and
- cause a result of at least one of the respective PIM operations to be stored in at least one of the memory regions without transferring the result of the respective PIM operations to the host.
7 more elements
Dependencies are inferred from the claim text.