Memory architecture having first and second voltages
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsAtul KATOCH, Cormac Michael O'CONNELL
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AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsAtul KATOCH, Cormac Michael O'CONNELL
Estimating the term…
A memory macro includes: word lines; memory cells arranged in an array, the array including rows and columns, the rows corresponding to the word lines, each memory cell being configured to receive a first reference voltage, and each column having voltage supply nodes corresponding to corresponding ones of the memory cells in the column; and switching circuits corresponding to the columns, each switching circuit being configured to selectively provide a first voltage value of a first voltage source or a second voltage value of a second voltage source to the voltage supply nodes; and wherein the first and second voltage values differ by a predetermined voltage value; each of the first and second voltage values is different than a second reference supply voltage; and the word lines are configured to receive the second voltage value as a voltage value representing a high logical value of the word lines.
A memory macro comprising:
A method for performing a memory write operation on memory cells in a memory macro,
A memory macro comprising:
Dependencies are inferred from the claim text.