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US 2020/0050559 A1Published application
Storage device performing a snooping operation for fast data transmission and a method thereof
AssigneeSamsung Electronics Co., Ltd.
InventorJunBum PARK
Life of this patent
Estimating the term…
Abstract
A memory controller according to example embodiments of the inventive concept includes a system bus, a first direct memory access (DMA) engine configured to write data in a buffer memory through the system bus, a snooper configured to output notification information indicating whether the data is stored in the buffer memory by snooping around the system bus, and a second direct memory access (DMA) engine configured to transmit the data written in the buffer memory to a host in response to the notification information from the snooper.
Claims20
A storage device comprising:
- a memory controller;
- a nonvolatile memory device connected with the memory controller through a first transmission channel;
- and
- a buffer memory device connected with the memory controller through a second transmission channel;
- wherein the memory controller comprises:
- a first direct memory access (DMA) engine configured to control writing first data from the nonvolatile memory device into the buffer memory device and output notification information after the writing the first data is completed;
- and
- a second direct memory access (DMA) engine configured to control transmitting the first data written into the buffer memory device to an external host device, in response to the notification information from the first DMA engine.
5 more elements
A storage device comprising:
- a nonvolatile memory device;
- a memory controller configured to receive a read request from an external host device through a first transmission channel, and in response to the read request, read first data from the nonvolatile memory device through a second transmission channel and transmit the first data to the external host device through the first transmission channel;
- and
- a buffer memory device connected with the memory controller through a third transmission channel,
- wherein the memory controller comprises:
- a first bus;
- a buffer controller configured to control the buffer memory device through the third transmission channel;
- a first direct access memory (DMA) engine configured to control the buffer controller through the first bus, such that the first data from the nonvolatile memory device is written in the buffer memory device;
- a snooper configured to monitor the first bus to detect whether the first data is written into the buffer memory device, and output notification information based on a result of the detection;
- and
- a second direct access memory (DMA) engine, in response to the notification information, configured to control the buffer controller through the first bus, such that the first data written into the buffer memory device is transmitted to the external host device through the second transmission channel.
8 more elements
A memory controller comprising:
- a first bus;
- a buffer memory;
- a first direct memory access (DMA) engine configured to write first data from a nonvolatile memory device into the buffer memory through the first bus;
- a snooper configured to monitor the first bus to detect whether the first data is written into the buffer memory, and output notification information based on a result of the detection;
- and
- a second direct access memory (DMA) engine configured to transmit the first data written into the buffer memory to an external host device, in response to the notification information from the snooper.
3 more elements
Dependencies are inferred from the claim text.