Memory system and operation method thereof
AssigneeSK hynix Inc.
InventorYeong Dong GIM
Life of this patent
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Abstract
An operation method of a memory system includes performing a first read operation on a word line corresponding to a read command, using a read voltage set including a first read voltage; performing a second read operation on the word line using a second read voltage greater than the first read voltage, depending on whether error correction on data read through the first read operation fails; and determining a memory block that includes a memory cell to which the word line is coupled as a closed memory block, depending on whether the word line is determined to be an erased word line as the result of the second read operation.
Claims10
An operation method of a memory system, comprising:
- performing a first read operation on a word line corresponding to a read command, using a read voltage set including a first read voltage;
- performing a second read operation on the word line using a second read voltage greater than the first read voltage, depending on whether error correction on data read through the first read operation fails;
- and
- determining a memory block that includes a memory cell to which the word line is coupled as a closed memory block, depending on whether the word line is determined to be an erased word line as the result of the second read operation.
An operation method of a memory system, comprising:
- performing an open block scanning operation of searching for an erased word line by repeatedly determining whether each of word lines included in an open memory block is an erased word line, when the memory system is powered up after a sudden power-off (SPO);
- and
- performing a repair operation on the erased word line, wherein the determining of whether a word line is the erased word line comprises:
- performing a first read operation by applying a first read voltage to the word line;
- performing a second read operation by applying a second read voltage greater than the first read voltage, depending on the number of erased cells included in the word line as the result of the first read operation;
- and
- determining that the word line is an erased word line, according to the result of the second read operation.
A memory system comprising:
- a memory device suitable for storing data;
- and
- a controller suitable for controlling the memory device,
- wherein the controller is suitable for:
- performing a first read operation on a word line using a first read voltage in response to a read request;
- performing error correction on data read by the first read operation;
- when the error correction on the read data fails, performing a second read operation on the word line using a second read voltage greater than the first read voltage;
- determining whether the word line is an erased word line based on the number of erase memory cells among memory cells coupling to the word line;
- and
- performing a disturb handling operation on a memory block that includes the erased word line.
Dependencies are inferred from the claim text.