Proactive Return of Write Credits in a Memory System
AssigneeMicron Technology, Inc.
InventorsTrevor Conrad Meyerowitz, Dhawal Bavishi
Life of this patent
Estimating the term…
Abstract
A memory system having memory components and a processing device to receive, from a host system, write commands to store data in the memory components, store the write commands in a buffer, and execute at least a portion of the write commands. For example, this write buffer capacity can be represented by write credit values on the host and the subsystem. The processing device determines an amount of available capacity of the buffer that becomes available after execution of at least the portion of the write commands, and signals the host system to receive information identifying the amount of available capacity, without a pending information request received from the host system.
Claims20
A memory system, comprising:
- a plurality of memory components;
- and
- a processing device, operatively coupled with the plurality of memory components, to:
- receive, from a host system, write commands to store data in the memory components;
- store the write commands in a buffer;
- execute at least a portion of the write commands;
- determine an amount of available capacity of the buffer that becomes available after execution of at least the portion of the write commands;
- and
- signal the host system to receive information identifying the amount of available capacity, without a pending information request received from the host system.
A method, comprising:
- receiving, in a memory module connected to a host system via a memory bus, write commands to store data in one or more memory components of the memory module;
- queuing, in a buffer of the memory module, the write commands;
- executing, by a controller of the memory module, at least a portion of the write commands from the buffer;
- determining an amount of available capacity of the buffer that is freed as a result of the executing of at least the portion of the write commands;
- and
- sending a signal over the memory bus to the host system to request the host system to receive information identifying the amount of available capacity, without a pending information request received in the memory model from the host system.
A non-transitory computer-readable storage medium storing instructions that, when executed by a processing device, cause the processing device to:
- receive, in a memory module connected to a host system via a memory bus, write commands to store data in one or more memory components of the memory module;
- store, in a buffer of the memory module, the write commands;
- execute, by the processing device of the memory module, at least a portion of the write commands from the buffer;
- determine an amount of available capacity of the buffer that is freed as a result of the executing of at least the portion of the write commands;
- and
- transmit a signal over the memory bus to the host system to request the host system to receive information identifying the amount of available capacity, without a pending information request received in the memory model from the host system.
Dependencies are inferred from the claim text.