Memory system and operation method for determining availability based on block status
AssigneeSK hynix Inc.
InventorJong-Min LEE
Life of this patent
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Abstract
A memory system includes a non-volatile memory device including at least one memory blocks storing a data and a controller coupled to the non-volatile memory device. The controller can perform at least one program operation or at least one erase operation within the at least one memory block. The controller can recognize an operation status of the at least one memory block in response to a time consumed for completing the at least one operation, and determine whether the at least one memory block is used and which priority is given to the at least one memory block based at least on the operation status so that the at least one memory block is allocated for a following operation.
Claims20
A memory system, comprising:
- a non-volatile memory device including at least one memory blocks storing data;
- and
- a controller, coupled to the non-volatile memory device, suitable for:
- performing at least one program operation or at least one erase operation within at least one memory block;
- recognizing an operation status of the at least one memory block in response to a time consumed for completing the operation;
- and
- determining whether the at least one memory block is used and which priority is given to the at least one memory block based at least on the operation status so that the at least one memory block is allocated for a following operation.
A method for controlling a memory system, comprising:
- requesting at least one program operation or at least one erase operation to a memory device including a plurality of memory blocks including a plurality of pages;
- performing the at least one program operation or the at least one erase operation within the at least one memory block;
- recognizing an operation status of the at least one memory block in response to a time consumed for completing the at least one program operation or the at least one erase operation;
- and
- determining whether the at least one memory block is used and which priority is given to the at least one memory block based at least on the operation status so that the at least one memory block is allocated for a following operation.
A control apparatus for a memory system, comprising:
- a memory interface, coupled to a memory device including a plurality of memory blocks including a plurality of pages, for performing an operation within at least one memory block among the plurality of memory blocks;
- control logic for recognizing an operation status of the at least one memory block in response to a time consumed for completing the operation and determining whether the at least one memory block is used and which priority is given to the at least one memory block based at least on the operation status;
- and
- a host interface, coupled to a host, for transferring a command or data received from the host to the control logic or transferring data which is requested by the host and transmitted from the memory interface.
Dependencies are inferred from the claim text.