Method and Apparatus for Semiconductor Manufacturing
AssigneeImec Vzw
InventorsChristopher Ausschnitt, Vincent Truffert
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AssigneeImec Vzw
InventorsChristopher Ausschnitt, Vincent Truffert
Estimating the term…
Examples herein are related to a method and apparatus for determining dimensions of features in a patterned layer of a chip produced on a semiconductor production wafer. The production of the patterned layer includes a lithography step and an etching step, where the lithographic mask applied for producing the patterned layer is provided with one or more asymmetric marks. The position of printed and etched mark features is sensitive to lithographic and etch parameters. Changes in these positions are measured by overlay measurements, i.e. the measurement of the change in position of one mark relative to another. The obtained ‘pseudo’ overlay data are fitted to a parametric model, while characteristic feature dimensions are measured on a test wafer. The inverted model allows determination of feature dimensions on a production wafer. Application of the method on two different layers allows determination of edge placement errors between features of the two layers.
An apparatus for lithography and etching of features on a semiconductor wafer, wherein the apparatus comprises:
Dependencies are inferred from the claim text.