Methods for selective deposition using self assembled monolayers

#Embodiments of the present disclosure generally relate to methods for selective deposition using self-assembled monolayers.

#Selective atomic layer deposition (ALD) and chemical vapor deposition (CVD) processes can advantageously reduce the number of steps and cost involved in conventional lithography while keeping up with the pace of device dimension shrinkage. Selective deposition in a metal dielectric pattern is of high potential value in back-end of line (BEOL) applications. Some alternative selective silicon based dielectric deposition techniques that have emerged are template-controlled growth, holographic based lithography, and the like. However, none of these alternative techniques provide a complete solution due to limitations relating to metal oxide formation under atmospheric conditions. The inventors have observed the nature of metal raises a severe challenge, e.g., the existence of native oxide on the metal surface. Because the metal oxides may act as dielectrics, the thin layer of native oxide makes the metal surface indistinguishable from dielectric surface for self-assembled monolayer (SAM) resulting in diminished selectivity or selectivity loss.

#Accordingly, the inventors have developed improved methods and apparatus for selective dielectric deposition using self-assembled monolayer as sacrificial and nucleation inhibition layer.

#Embodiments of the present disclosure, briefly summarized above and discussed in greater detail below, can be understood by reference to the illustrative embodiments of the disclosure depicted in the appended drawings. However, the appended drawings illustrate only typical embodiments of the disclosure and are therefore not to be considered limiting of scope, for the disclosure may admit to other equally effective embodiments.

#FIG. 1 is a process chamber suitable for performing a chemical vapor deposition process or atomic layer deposition process in accordance with some embodiments of the present disclosure.

#FIG. 2 is a flowchart of a method of selective deposition in accordance with some embodiments of the present disclosure.

#To facilitate understanding, identical reference numerals have been used, where possible, to designate identical elements that are common to the figures. The figures are not drawn to scale and may be simplified for clarity. Elements and features of one embodiment may be beneficially incorporated in other embodiments without further recitation.

#Methods for selective deposition using self-assembled monolayer (SAM) are provided herein. In some embodiments, the methods described herein advantageously condition a substrate having a metal surface and a dielectric surface by contacting the metal surface with one or more metal halides such as metal chlorides, metal fluorides and the like to form an exposed metal surface, wherein the exposed metal surface inhibits deposition of an organosilane based self-assembled monolayer thereon. The exposed metal surface advantageously does not include a problematic oxide layer which may promote deposition of an organosilane based self-assembled monolayer thereon and limit or destroy the selectivity of the process.

#FIG. 2 is a flow diagram of a method 200 of processing a substrate having a metal surface and a dielectric surface in accordance with some embodiments of the present disclosure. FIGS. 3A-3E are illustrative cross-sectional views of the substrate during different stages of the processing sequence of FIG. 2 in accordance with some embodiments of the present disclosure. The methods of the present disclosure may be performed in process chambers configured for atomic layer deposition (ALD) or chemical vapor deposition (CVD), such as the process chamber discussed below with respect to FIG. 1.