Mems chip and electrical packaging method for mems chip

An electrical packaging method for a MEMS chip, wherein the MEMS chip comprises a MEMS device layer, a first isolating layer, and a first conducting layer, the MEMS device layer comprising a first region and at least one second region, the first region comprising MEMS movable structures and conductive structures, the conductive structures being distributed among the MEMS movable structures, the second region being an electrode arrangement region, and on an upper surface of the MEMS chip, the conductive structures being electrically isolated from electrodes in the second region, and the method comprises:

• arranging the first isolating layer and the first conducting layer in sequence under the MEMS device layer, wherein
• at the first isolating layer, a corresponding quantity of first conductive through holes are disposed in locations corresponding to the conductive structures in the first region and in locations corresponding to the electrodes in the second region, and
• the first conducting layer comprises M electrodes spaced apart from one another, the M electrodes being respectively connected to M of the first conductive through holes, M being a positive integer, and M being set based on a quantity of the conductive structures in the first region and a quantity of the electrodes in the second region;
• and
• electrically connecting, in a one-to-one correspondence at the first conducting layer, electrodes in locations corresponding to at least some of the conductive structures in the first region to electrodes in locations corresponding to at least some of the electrodes in the second region.