Low-area, low-power neural recording circuit, and method of training the same

Abstract

A sensor circuit that is capable of sensing of neural action potentials is disclosed. The circuit can be designed to minimize power dissipation and total silicon area so that it can be incorporated into a massively parallel sensor array and ultimately implanted in the body (e.g. into the brain) in a safe manner. The circuit can also be designed to be tunable such that it can be optimized in silico prior to fabrication, and can be optimized through the use of controllable current sources after fabrication.

Dependencies are inferred from the claim text.