Polar code encoding/decoding method and encoding/decoding apparatus

An encoding apparatus, comprising:

• a cyclic redundancy check (CRC) encoding unit, configured to perform CRC encoding on an information block to obtain a CRC encoded block with a length of B, wherein a CRC length is Lcrc, an information block length is K, and B=K+Lcrc;
• an interleaving unit, configured to interleave the CRC encoded block, wherein Lpc CRC bits in an interleaved encoded block are located between bits of the information block, each CRC bit of the Lpc CRC bits is located after all bits checked by using the CRC bit, and Lpc is an integer greater than 0 and less than Lcrc;
• and
• a polar encoding unit, configured to:
• map the encoded block obtained after the interleaving is performed by the interleaving unit to positions of information bits, set a frozen bit to an agreed fixed value, and perform polar encoding on the information bits and the frozen bit to obtain a polar encoded codeword, wherein positions of the information bits are positions corresponding to B polarized channels with optimal reliability, a position of the frozen bit is a position corresponding to one of remaining N−B polarized channels, and N is a mother code length of a polar code.

An encoding apparatus, comprising:

• a memory, configured to store a program;
• and
• a processor, configured to execute the program stored in the memory, wherein when the program is executed, the processor is configured to:
• perform cyclic redundancy check CRC encoding on an information block to obtain a CRC encoded block with a length of B, wherein a CRC length is Lcrc, an information block length is K, and B=K+Lcrc;
• interleave the CRC encoded block, wherein Lpc CRC bits in an interleaved encoded block are located between bits of the information block, each CRC bit of the Lpc CRC bits is located after all bits checked by using the CRC bit, and Lpc is an integer greater than 0 and less than Lcrc;
• map the interleaved encoded block to information bits, set a frozen bit to an agreed fixed value, and perform polar encoding on the information bits and the frozen bit to obtain a polar encoded codeword, wherein positions of the information bits are positions corresponding to B polarized channels with optimal reliability, a position of the frozen bit is a position corresponding to one of remaining N−B polarized channels, and N is a mother code length of a polar code.

An encoding apparatus, comprising:

• at least one input end, configured to receive an information block;
• a signal processor, configured to:
• perform cyclic redundancy check CRC encoding on the information block to obtain a CRC encoded block with a length of B, wherein a CRC length is Lcrc, an information block length is K, and B=K+Lcrc;
• interleave the CRC encoded block, wherein Lpc CRC bits in an interleaved encoded block are located between bits of the information block, each CRC bit of the Lpc CRC bits is located after all bits checked by using the CRC bit, and Lpc is an integer greater than 0 and less than Lcrc;
• map the interleaved encoded block to information bits, set a frozen bit to an agreed fixed value, and perform polar encoding on the information bits and the frozen bit to obtain a polar encoded codeword, wherein positions of the information bits are positions corresponding to B polarized channels with optimal reliability, a position of the frozen bit is a position corresponding to one of remaining N−B polarized channels, and N is a mother code length of a polar code;
• and
• at least one output end, configured to output the polar encoded codeword obtained by the signal processor.