Vertical transport logic circuit cell with shared pitch
AssigneeInternational Business Machines Corporation
InventorsBrent A. Anderson, Albert Chu
Life of this patent
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Abstract
A semiconductor structure includes a vertical transport logic circuit cell. The vertical transport logic cell includes a first logic gate and at least a second logic gate. The first logic gate includes at least one input terminal and at least one output terminal. The second logic gate includes at least one input terminal and at least one output terminal. One of the input terminal and the output terminal of the first logic gate shares a pitch of the vertical transport logic circuit cell with one of the input terminal and the output terminal of the second logic gate. The first and second logic gates can include the same type or different types of logic functions.
Claims25
A semiconductor structure, comprising:
- a vertical transport logic circuit cell comprising a first logic gate and at least a second logic gate positioned in a substantially side-by-side configuration, the first logic gate comprising at least one input terminal and at least one output terminal;
- the second logic gate comprising at least one input terminal and at least one output terminal;
- wherein one of the input terminal and the output terminal of the first logic gate shares a pitch of the vertical transport logic circuit cell with one of the input terminal and the output terminal of the second logic gate.
An integrated circuit, comprising:
- one or more vertical transport logic circuit cells, wherein at least one of the one or more vertical transport logic circuit cells comprises a first logic gate and at least a second logic gate positioned in a substantially side-by-side configuration the first logic gate comprising at least one input terminal and at least one output terminal;
- the second logic gate comprising at least one input terminal and at least one output terminal;
- wherein one of the input terminal and the output terminal of the first logic gate shares a pitch of the vertical transport logic circuit cell with one of the input terminal and the output terminal of the second logic gate.
A method for fabricating a semiconductor structure, comprising:
- in a vertical transport logic circuit cell comprising a first logic gate and at least a second logic gate positioned in a substantially side-by-side configuration, wherein the first logic gate comprises at least one input terminal and at least one output terminal, and the second logic gate comprises at least one input terminal and at least one output terminal;
- sharing a pitch of the vertical transport logic circuit cell between one of the input terminal and the output terminal of the first logic gate and one of the input terminal and the output terminal of the second logic gate.
A semiconductor structure, comprising:
- a vertical transport logic circuit cell comprising a first logic gate and at least a second logic gate positioned in a substantially side-by-side configuration;
- wherein the first logic gate and the second logic gate share a pitch of the vertical transport logic circuit cell.
Dependencies are inferred from the claim text.