Resistive memory crossbar array with top electrode inner spacers
AssigneeInternational Business Machines Corporation
InventorsTakashi Ando, Hiroyuki Miyazoe, Iqbal R. Saraf, Shyng-Tsong Chen
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Abstract
A method is presented for protecting resistive random access memory (RRAM) stacks within a resistive memory crossbar array. The method includes forming conductive lines within an interlayer dielectric (ILD), forming a metal nitride layer over at least one conductive line, forming a bottom electrode, forming a RRAM stack over the metal nitride layer, the RRAM stack including a first top electrode and a second top electrode, undercutting the second top electrode to define recesses, and filling the recesses with inner spacers.
Claims20
A semiconductor structure for protecting resistive random access memory (RRAM) stacks within a resistive memory crossbar array, the semiconductor structure comprising:
- a plurality of conductive lines disposed within an inter-layer dielectric (ILD);
- a barrier layer disposed in direct contact with a conductive line of the plurality of conductive lines;
- a bottom electrode disposed over the barrier layer;
- a high-k dielectric layer disposed over the bottom electrode;
- and
- a top electrode disposed over the high-k dielectric layer, the top electrode including a first metal layer and a second metal layer, the second metal layer accommodating inner spacers therein.
A semiconductor structure for protecting resistive random access memory (RRAM) stacks within a resistive memory crossbar array, the semiconductor structure comprising:
- a plurality of conductive lines disposed within an interlayer dielectric (ILD);
- a RRAM stack disposed over a conductive line of the plurality of conductive lines, the RRAM stack including at least a top electrode having a first metal layer and a second metal layer;
- and
- inner spacers constructed on opposed ends of the second metal layer of the top electrode.
Dependencies are inferred from the claim text.