Semiconductor device and method for fabricating the same
AssigneeUnited Microelectronics Corp.
InventorsPurakh Raj Verma, Chih-Wei Su, Je-Min Wen
Life of this patent
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Abstract
A method for fabricating semiconductor device includes the steps of: providing a substrate having a first silicon layer, an insulating layer on the first silicon layer, and a second silicon layer on the insulating layer; forming a metal-oxide semiconductor (MOS) transistor on the substrate; forming an interlayer dielectric layer (ILD) on the MOS transistor; removing part of the ILD layer to form a first trench to expose the insulating layer; and performing a wet etching process through the first trench to remove part of the insulating layer for forming a first air gap under the MOS transistor.
Claims20
A method for fabricating semiconductor device, comprising:
- providing a substrate having a first silicon layer, an insulating layer on the first silicon layer, and a second silicon layer on the insulating layer;
- forming a metal-oxide semiconductor (MOS) transistor on the substrate;
- forming an interlayer dielectric layer (ILD) on the MOS transistor;
- removing part of the ILD layer to form a first trench to expose the insulating layer;
- and
- performing a wet etching process through the first trench to remove part of the insulating layer for forming a first air gap extending from one side of the MOS transistor to another side of the MOS transistor in the insulating layer and under the MOS transistor.
A semiconductor device, comprising:
- a substrate having a first silicon layer, an insulating layer on the first silicon layer, and a second silicon layer on the insulating layer;
- a metal-oxide semiconductor (MOS) transistor on the substrate;
- and
- a first air gap in the insulating layer and directly under the MOS transistor, wherein a bottom surface of the first air gap is even with a bottom surface of the insulating layer.
A semiconductor device, comprising:
- a substrate having a first silicon layer, an insulating layer on the first silicon layer, and a second silicon layer on the insulating layer;
- a metal-oxide semiconductor (MOS) transistor on the substrate;
- an interlayer dielectric (ILD) layer on the MOS transistor;
- and
- a first air gap under the MOS transistor and extended upward into the ILD layer, wherein the first air gap comprises a U-shape and extends from one side of the MOS transistor to another sides of the MOS transistor in the insulating layer.
Dependencies are inferred from the claim text.