Semiconductor device
AssigneeSanken Electric Co., Ltd.
InventorHironori AOKI
Life of this patent
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Abstract
A current collapse characteristic is sufficiently suppressed. After forming a large opening (first opening) passing through both of a TEOS oxide layer 42 and an oxide layer 41, a thin oxide layer (third insulating layer) 43 entirely covering the layers and the opening. In the oxide layer 43 inside the first opening, an opening (second opening) for exposing a group-III nitride semiconductor layer 10 is provided. A gate electrode 50 is formed at a slanted portion of the first opening including the second opening. A taper angle of the opening is smaller in the TEOS oxide layer 42 than in the oxide layer 41.
Claims4
A semiconductor device using an electrode layer formed on a portion of an insulating layer formed on a semiconductor layer,
- the insulating layer comprising:
- a first insulating layer being in contact with the semiconductor layer and a second insulating layer formed on the first insulating layer;
- a first opening formed to pass through both the second insulating layer and the first insulating layer;
- a third insulating layer formed continuously in a manner to cover an inside of the first opening and with a smaller thickness than that of the first insulating layer;
- and
- a second opening for exposing the semiconductor layer formed at a portion of the third insulating layer inside the first opening,
- the second insulating layer being thinner than the first insulating layer,
- compared to a first side surface of the first insulating layer constituting the first opening, a second side surface of the second insulating layer present immediately above the first side surface and constituting the first opening being configured to be more gradual, and
- the electrode layer being in contact with both the first side surface and the second side surface.
Dependencies are inferred from the claim text.