Semiconductor structure with insulating substrate and fabricating method thereof
AssigneeVanguard International Semiconductor Corporation
InventorFrancois HEBERT
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Abstract
A semiconductor structure includes an insulating substrate, an engineered layer, a semiconductor layer, a gate structure, a source region, and a drain region. The engineered layer is surrounding the insulating substrate. The semiconductor layer including a first region and a second region is formed over the engineered layer. The gate structure is formed over the semiconductor layer. The source region and the drain region are formed in the semiconductor layer and located on both sides of the first gate structure.
Claims26
A semiconductor structure, comprising:
- an insulating substrate;
- an engineered layer, surrounding the insulating substrate;
- a semiconductor layer, formed over the engineered layer and comprising a first region and a second region;
- an isolation structure, formed in the semiconductor layer and located between the first region and the second region;
- a first gate structure, formed over the semiconductor layer within the first region;
- a first source region and a first drain region, formed in the semiconductor layer within the first region, wherein the first source region and the first drain region are located on both sides of the first gate structure;
- a second gate structure, formed over the semiconductor layer within the second region;
- and
- a second source region and a second drain region, formed over the semiconductor layer within the second region, wherein the second source region and the second drain region are located on both sides of the second gate structure.
A method for fabricating a semiconductor structure, comprising:
- providing an insulating substrate;
- forming an engineered layer surrounding the insulating substrate;
- forming a semiconductor layer over the engineered layer, wherein the semiconductor layer comprises a first region and a second region;
- forming an isolation structure in the semiconductor layer, wherein the isolation structure is located between the first region and the second region;
- forming a first gate structure over the semiconductor layer within the first region;
- forming a first source region and a first drain region in the semiconductor layer within the first region, wherein the first source and the first drain are located on both sides of the first gate structure;
- forming a second gate structure over the semiconductor layer within the second region;
- and
- forming a second source region and a second drain region in the semiconductor layer within the second region, wherein the second source region and the second drain region are located on both sides of the second gate structure.
Dependencies are inferred from the claim text.