Memory device
AssigneeToshiba Memory Corporation
InventorsToshiya MURAKAMI, Akihiro KAJITA, Masumi SAITOH
Life of this patent
Estimating the term…
Loading patent…
AssigneeToshiba Memory Corporation
InventorsToshiya MURAKAMI, Akihiro KAJITA, Masumi SAITOH
Estimating the term…
According to one embodiment, a memory device includes first and second electrically conductive portions, a first variable resistance portion, and a first region. A direction from the first electrically conductive portion toward the second electrically conductive portion is aligned with a first direction. The first variable resistance portion is provided between the first and second electrically conductive portions. A second direction from the first variable resistance portion toward the first region crosses the first direction. The first region includes a first layer portion, and a second layer portion provided between the first layer portion and the first variable resistance portion in the second direction. A first distance between the first and second layer portions is longer than first or second lattice length. The first lattice length is a lattice length of the first layer portion. The second lattice length is a lattice length of the second layer portion.
A memory device, comprising:
A memory device, comprising:
A memory device, comprising:
Dependencies are inferred from the claim text.