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US 2020/0027922 A1Published application
Memory circuit and formation method thereof
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChun-Yang Tsai, Kuo-Ching Huang, Tong-Chern Ong
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Abstract
The present disclosure, in some embodiments, relates to an integrated chip. The integrated chip includes a control device arranged within a substrate and having a terminal. A first memory device is coupled between the terminal of the control device and a first bit-line. A second memory device is coupled between the terminal of the control device and a second bit-line.
Claims20
An integrated chip, comprising:
- a control device arranged within a substrate and having a terminal;
- a first memory device coupled between the terminal of the control device and a first bit-line;
- and
- a second memory device coupled between the terminal of the control device and a second bit-line.
1 more element
A memory circuit, comprising:
- a first memory device operably coupled between a source-line and a first bit-line;
- a second memory device operably coupled between the source-line and a second bit-line;
- and
- a sense amplifier operably coupled to the first bit-line and to the second bit-line.
1 more element
A memory circuit, comprising:
- a first memory device having a first terminal and a second terminal, the first terminal operably coupled to a source-line;
- a second memory device having a third terminal and a fourth terminal, the third terminal operably coupled to the source-line;
- and
- a sense amplifier having a first input coupled to the second terminal and a second input coupled to the fourth terminal.
1 more element
Dependencies are inferred from the claim text.