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AssigneepSemi Corporation
InventorsAbhijeet Paul, Hiroshi Yamada, Alain Duvallet
Estimating the term…
FET IC structures that enable formation of high-Q inductors in a “flipped” SOI IC structure made using a back-side access process, such as an single layer transfer (SLT) process. Essentially, the interconnect layer superstructure of an IC is split into two parts, a “lower” superstructure and an “upper” superstructure. In various embodiments, one or more low-resistance interconnect layers are fabricated within an upper superstructure formed after the application of a back-side access process, allowing fabrication of inductors in one or more low-resistance interconnect layer. A significant advantage of such IC structures is that the low-resistance interconnect layer or layers are relocated from being near the handle wafer of a conventional SLT IC to being spaced away from the handle wafer by intervening structures. Fabricating inductors in such spaced low-resistance interconnect layer or layers reduces electromagnetic coupling with the handle wafer and thus increases the Q factor of the inductors.
An integrated circuit structure having a first side originally formed on a substrate, and an opposite second side, the first side being attached to a handle wafer and the opposite second side including one or more low-resistance interconnect layers fabricated within an upper superstructure formed after the application of a back-side access process.
An integrated circuit structure attached to a handle wafer and including one or more low-resistance interconnect layers fabricated within an upper superstructure formed after the application of a back-side access process, further including at least one inductor fabricated as part of at least one of the one or more low-resistance interconnect layers of the upper superstructure.
(canceled)
An integrated circuit structure attached to a handle wafer and including one or more low-resistance interconnect layers fabricated within an upper superstructure formed after the application of a back-side access process, further including at least one inductor fabricated as part of a first one of the one or more low-resistance interconnect layers of the upper superstructure, and at least one inductor fabricated as part of a second one of the one or more low-resistance interconnect layers of the upper superstructure, wherein at least one inductor fabricated as part of the first one of the one or more low-resistance interconnect layers is positioned sufficiently close to at least one inductor fabricated as part of the second one of the one or more low-resistance interconnect layers so as to function as a transformer.
-45. (canceled)
Dependencies are inferred from the claim text.