Array substrate, display panel and manufacturing method of the array substrate
AssigneeWuhan China Star Optoelectronics Technology Co., Ltd.
InventorChen CHEN
Life of this patent
Estimating the term…
Abstract
The present disclosure provides an array substrate, a display panel and a manufacturing method of the array substrate, and the array substrate comprises a gate line, a thin film transistor (TFT), a passivation layer and a pixel electrode; wherein the gate line is electrically connected to a gate electrode of the thin film transistor, the pixel electrode is electrically connected to a drain electrode of the thin film transistor, the passivation layer is located between a layer where the thin film transistor is located and a layer where the pixel electrode is located, the passivation layer has a thickness gradually changed along an extending direction of the gate line. The present disclosure can improve the uniformity of displayed images by the above array substrate.
Claims13
An array substrate, comprising:
- a gate line, a thin film transistor (TFT), a passivation layer formed of a material selected from a group consisting of silicon nitride and silicon oxide, and a pixel electrode;
- wherein the gate line is electrically connected to a gate electrode of the TFT, the pixel electrode is electrically connected to a drain electrode of the TFT, the passivation layer is located between a first layer where the TFT is located and a second layer where the pixel electrode is located, and the passivation layer has a gradually decreasing thickness in a direction defined by an extension of the gate line of the gate electrode of the corresponding TFT.
A display panel, comprising:
- an array substrate comprises a gate line, a thin film transistor (TFT), a passivation layer formed of a material selected from a group consisting of silicon nitride and silicon oxide, and a pixel electrode, wherein the gate line is electrically connected to a gate electrode of the TFT, the pixel electrode is electrically connected to a drain electrode of the TFT, the passivation layer is located between a first layer where the TFT is located and a second layer where the pixel electrode is located, and the passivation layer has a gradually changing thickness in a direction defined by the gate line.
(canceled)
A manufacturing method of an array substrate, comprising:
- providing a substrate;
- forming a gate line, a thin film transistor, a passivation layer formed of a material selected from a group consisting of silicon nitride and silicon oxide and a pixel electrode on the substrate in sequence;
- wherein the gate line is electrically connected to a gate electrode of the thin film transistor, the pixel electrode is electrically connected to a drain electrode of the thin film transistor, the passivation layer is located between a first layer where the thin film transistor is located and a second layer where the pixel electrode is located, and the passivation layer has a gradually changing thickness in a direction defined by an extension of the gate line of the gate electrode of the corresponding thin film transistor.
(canceled)
Dependencies are inferred from the claim text.