Split-gate non-volatile memory and fabrication method thereof

A method for fabricating a split-gate non-volatile memory, characterized in that the method for fabricating the split-gate type non-volatile memory comprises the following steps:

• 1) providing a semiconductor substrate and forming a plurality of shallow trench isolation structures in the semiconductor substrate, wherein the plurality of shallow trench isolation structures isolate a plurality of spaced active regions in the semiconductor substrate;
• 2) forming a plurality of spaced word lines on the semiconductor substrate;
• 3) forming at least one source and at least one drain in the semiconductor substrate, and forming a floating gate on a sidewall of the word lines on a side close to the source, wherein the source and the drain are respectively located on two opposite sides of the word lines, a width of the floating gate gradually decreases from a bottom portion to a top portion, such that a portion of the top portion of the floating gate that contacts with the word lines presents as a sharp tip;
• 4) removing part of the word lines by adopting an etching process, such that the sharp tip of the top portion of the floating gate is higher than an upper edge of a top portion of the word lines;
• 5) forming a tunneling dielectric layer and an erasing gate at the top portion of the floating gate, wherein the tunneling dielectric layer at least covers part of the sharp tip of the top portion of the floating gate, and the erasing gate is located on an upper surface of the tunneling dielectric layer;
• and
• 6) forming a conductive plug on the drain, and forming a plurality of spaced metal bit lines on the conductive plug, wherein the metal bit lines are electrically connected to the drain through the conductive plug.