Dynamic random access memory structure and method for preparing the same
AssigneeNanya Technology Corporation
InventorsDA-ZEN CHUANG, CHIH-CHUNG SUN
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Abstract
The present disclosure provides a DRAM cell structure. The DRAM cell structure includes a substrate, a gate structure disposed in the substrate, a source region and a drain region disposed in the substrate respectively at two sides of the gate structure, a landing pad disposed over the drain region, a plurality of carbon nanotubes disposed on the landing pad, a top electrode disposed over the plurality of carbon nanotubes, and a dielectric layer disposed between the top electrode and the plurality of carbon nanotubes.
Claims18
A dynamic random access memory (DRAM) cell structure comprising:
- a substrate;
- a gate structure disposed in the substrate;
- a source region and a drain region disposed in the substrate respectively at two sides of the gate structure;
- a landing pad disposed over the drain region;
- a plurality of carbon nanotubes (CNTs) disposed on the landing pad, wherein the plurality of carbon nanotubes comprise different diameters;
- a top electrode disposed over the plurality of carbon nanotubes;
- and
- a dielectric layer disposed between the top electrode and the plurality of carbon nanotubes.
(canceled)
A method for preparing a DRAM cell structure, comprising:
- providing a substrate comprising at least an active region, at least a gate structure disposed in the active region, and a source region and a drain region disposed in the active region at two sides of the gate structure;
- forming a conductive layer over the substrate;
- vertically growing a plurality of carbon nanotubes on the conductive layer, wherein the plurality of carbon nanotubes physically contact the conductive layer;
- patterning the conductive layer;
- and
- conformally forming a dielectric layer to cover the plurality of carbon nanotubes and the conductive layer;
- wherein the patterning of the conductive layer is performed before the forming of the plurality of carbon nanotubes;
- wherein the dielectric layer covers a top surface and sidewalls of each of the plurality of carbon nanotubes, portions of a top surface of the conductive layer, and sidewalls of the conductive layer.
(canceled)
(canceled)
A method for preparing a DRAM cell structure, comprising:
- providing a substrate comprising at least an active region, at least a gate structure disposed in the active region, and a source region and a drain region disposed in the active region at two sides of the gate structure;
- forming a conductive layer over the substrate;
- vertically growing a plurality of carbon nanotubes on the conductive layer, wherein the plurality of carbon nanotubes physically contact the conductive layer;
- patterning the conductive layer;
- and
- conformally forming a dielectric layer to cover the plurality of carbon nanotubes and the conductive layer;
- wherein the patterning of the conductive layer is performed after the forming of the plurality of carbon nanotubes.
Dependencies are inferred from the claim text.