Semiconductor device and method of fabricating the same

A semiconductor device comprising:

• a fin region protruding from a substrate;
• a gate structure crossing the fin region, the gate structure covering a top surface and opposite sidewalls of the fin region;
• a source/drain at each of opposite sides of the gate structure in the fin region;
• a source/drain contact connected to the source/drain;
• a gate contact connected to the gate structure;
• an etch stop layer on the gate structure, the etch stop layer including a lower etch stop layer, a passivation layer, and an upper etch stop layer sequentially stacked on top of each other,
• a resistive structure on the etch stop layer;
• a plurality of merged contacts connected to the source/drain contact or the gate contact, respectively;
• and
• a resistive contact connected to the resistive structure.

A method of fabricating a semiconductor device, the method comprising:

• forming an active gate structure and a dummy gate structure on a substrate, the substrate including a first region and a second region, the active gate structure being formed on the substrate in the first region, and the dummy gate structure being formed on the substrate in the second region;
• forming a source/drain on the substrate in the first region at each of opposite sides of the active gate structure;
• forming a lower interlayer insulating film on the substrate, the lower interlayer insulating film covering sidewalls of the active gate structure and covering sidewalls of the dummy gate structure, and the lower interlayer insulating film exposing a top surface of the active gate structure and a top surface of the dummy gate structure;
• forming a plurality of first conductive contacts respectively connected to the active gate structure and the source/drain;
• forming an etch stop layer on the lower interlayer insulating film and the plurality of first conductive contacts, the etch stop layer including a lower etch stop layer and an upper etch stop layer;
• forming a resistive structure on the etch stop layer in the second region;
• forming an upper interlayer insulating film covering the etch stop layer and the resistive structure;
• and
• forming a plurality of second conductive contacts connected to the plurality of first conductive contacts while passing through the upper interlayer insulating film and the etch stop layer, and
• forming a plurality of second conductive contacts connected to the resistive structure while passing through the upper interlayer insulating film.