Semiconductor Device and Method
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChen-Hua Yu, Hui-Jung Tsai, Hung-Jui Kuo, Chung-Shi Liu, Han-Ping Pu, Ting-Chu Ko
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Abstract
In accordance with some embodiments a via is formed over a semiconductor device, wherein the semiconductor device is encapsulated within an encapsulant 129. A metallization layer and a second via are formed over and in electrical connection with the first via, and the metallization layer and the second via are formed using the same seed layer. Embodiments include fully landed vias, partially landed vias in contact with the seed layer, and partially landed vias not in contact with the seed layer.
Claims20
A method of manufacturing a semiconductor device, the method comprising:
- forming a first via to a first semiconductor device encapsulated in an encapsulant;
- forming a seed layer over the first via;
- forming a metallization layer over the seed layer, the metallization layer having a first width;
- and
- forming a second via over the metallization layer, the second via having a second width less than the first width, wherein the forming the metallization layer and the forming the second via both utilize the seed layer, and wherein the forming the second via forms the second via to cover a sidewall of the metallization layer.
A method of manufacturing a semiconductor device, the method comprising:
- depositing a seed layer over a first via over a substrate, the first via being electrically connected to a first external connection of a first die, the first die being encapsulated within an encapsulant;
- patterning a first opening into a first photoresist over the seed layer;
- electroplating a first metallization layer within the first opening of the first photoresist utilizing the seed layer;
- removing the first photoresist;
- after the removing the first photoresist, patterning a second opening into a second photoresist over the first metallization layer, wherein the second opening exposes a portion of the seed layer;
- and
- electroplating a second via within the second opening of the second photoresist utilizing the seed layer.
A semiconductor device comprising:
- a semiconductor die encapsulated within an encapsulant;
- a first via extending through a first dielectric layer to electrically couple to the semiconductor die, the first via having straight sidewalls from a top of the first via to a bottom of the first via;
- a first seed layer in electrical connection with the first via;
- a first metallization layer over and in physical contact with the first seed layer, the first metallization layer comprising a first material throughout the first metallization layer;
- a second via in direct physical contact with the first metallization layer, the second via comprising a second material throughout the second via;
- and
- a dielectric material covering sidewalls of both the first metallization layer and the second via, the dielectric material comprising a third material throughout the dielectric material, wherein a first surface of the second via facing away from the first metallization layer is exposed by the dielectric material.
Dependencies are inferred from the claim text.