Method for forming chip package structure

A method for forming a chip package structure, comprising:

• bonding a chip structure to an interposer substrate through a first conductive bump, wherein the interposer substrate comprises a core layer and a conductive via structure passing through the core layer and electrically connected to the chip structure;
• forming a first molding layer over the interposer substrate and surrounding the chip structure;
• forming a second conductive bump over the interposer substrate, wherein the interposer substrate is between the second conductive bump and the chip structure;
• forming a redistribution structure over a carrier substrate, wherein the redistribution structure has a first surface and a second surface;
• bonding the interposer substrate to the first surface through the second conductive bump;
• forming a second molding layer over the redistribution structure and surrounding the first molding layer, the interposer substrate, and the chip structure;
• removing the carrier substrate;
• partially removing the redistribution structure from the second surface;
• and
• forming a third conductive bump over the second surface.

A chip package structure, comprising:

• a first redistribution structure having a first surface and a second surface, wherein the first redistribution structure comprises a first pad and a second pad, the first pad is adjacent to the first surface, and the second pad is adjacent to the second surface;
• a chip package bonded to the first pad through a first bump, wherein a first width of the first pad decreases in a first direction away from the chip package, and a second width of the second pad decreases in the first direction;
• and
• a second bump over the second pad.