Electronic Component Package

A semiconductor package, comprising:

• a semiconductor chip having an active surface on which a connection pad is disposed and an inactive surface opposing the active surface;
• an encapsulant covering at least a portion of the semiconductor chip;
• a connection structure disposed on the active surface of the semiconductor chip, and including one or more redistribution layers electrically connected to the connection pad;
• a surface treatment layer disposed on a surface of a lowermost redistribution layer, among the one or more redistribution layers, of the connection structure;
• and
• a passivation layer disposed on the connection structure, covering at least a portion of each of the lowermost redistribution layer and the surface treatment layer, and having an opening exposing at least a portion of the surface treatment layer,
• wherein a surface on which the surface treatment layer is disposed, of the lowermost redistribution layer, has a surface roughness greater than that of a surface of the lowermost redistribution layer opposite to the surface on which the surface treatment layer is disposed, and
• the surface treatment layer has irregularities along the surface roughness of the lowermost redistribution layer.