Method for forming a multi-level interconnect structure

A method for forming a multi-level interconnect structure on a substrate, comprising:

• forming on a substrate a first interconnection level comprising a first dielectric layer and a first set of conductive structures arranged in the first dielectric layer;
• forming on the first interconnection level a second interconnection level comprising a second dielectric layer and a second set of conductive structures arranged in the second dielectric layer;
• forming on the second interconnection level a third interconnection level, wherein forming the third interconnection level comprises:
• forming a third dielectric layer,
• forming a trench mask on the third dielectric layer, the trench mask comprising a pattern of trenches for defining positions of a third set of conductive structures to be formed in the third dielectric layer,
• forming a multi-level via hole by etching the third dielectric layer in a region exposed within one of the trenches, the multi-level via hole extending through the third dielectric layer and the second dielectric layer to a structure of the first set of conductive structures such that a surface of the structure is exposed at a bottom of the multi-level via hole,
• selectively depositing a first conductive material in the multi-level via hole on the structure of the first set of conductive structures,
• transferring the pattern of the trench mask into the third dielectric layer by etching to form a set of dielectric layer trenches for accommodating the third set of conductive structures, and
• depositing a second conductive material filling the set of dielectric layer trenches, wherein the second conductive material deposited in one of the dielectric layer trenches is deposited on the first conductive material selectively deposited in the multi-level via hole.