Three-dimensional memory devices

A three-dimensional (3D) memory device, comprising:

• a substrate;
• a peripheral device disposed on the substrate;
• a memory stack disposed above the peripheral device and comprising a plurality of conductor/dielectric layer pairs;
• a plurality of memory strings, each of the memory strings extending vertically through the memory stack;
• a first interconnect layer disposed above the memory strings, and a second interconnect layer disposed below the memory strings;
• a plurality of first via contacts, each of the first via contacts comprising a lower end in contact with a conductor layer in one of the conductor/dielectric layer pairs and an upper end in contact with the first interconnect layer;
• and
• a plurality of second via contacts, each of the second via contacts comprising a lower end in contact with the second interconnect layer and an upper end in contact with one of the memory strings.

A three-dimensional (3D) memory device, comprising:

• a first semiconductor structure, comprising:
• a plurality of memory strings, each of the memory strings extending vertically and comprising a semiconductor plug at an upper end of the memory string;
• a first interconnect layer disposed above the memory strings, and a second interconnect layer disposed below the memory strings;
• and
• a plurality of first via contacts, each of the first via contacts comprising a lower end in contact with one of the semiconductor plugs and an upper end in contact with the first interconnect layer;
• a second semiconductor structure, comprising:
• a substrate;
• a peripheral device disposed on the substrate;
• and
• a third interconnect layer disposed above the peripheral device;
• and
• a bonding interface between the first semiconductor structure and the second semiconductor structure, wherein the second interconnect layer contacts the third interconnect layer at the bonding interface.