Protecting parallel multiplication operations from external monitoring attacks

A system comprising:

• an input interface to receive an input data block and an iteration result value;
• a first multiplier circuit to perform a first field multiplication operation to produce a new iteration result value, by iteratively processing, starting from a first bit position, bits of a combination of the input data block and the iteration result value, wherein the first bit position is represented by one of:
• a least-significant bit and a most-significant bit;
• a second multiplier circuit to perform a second field multiplication operation to produce a new mask correction value, by iteratively processing operand bits starting from a second bit position, wherein the second bit position is represented by one of:
• a least-significant bit and a most-significant bit, and wherein the second bit position is different from the first bit position;
• and
• an adder circuit to apply the new mask correction value to the new iteration result value.

A system, comprising:

• a first multiplier circuit to multiply a hash key by a combination of an input data block and a masked result value to produce a new masked result value, by iteratively processing operand bits starting from a first bit position, wherein the first bit position is represented by one of:
• a least-significant bit and a most-significant bit;
• a second multiplier circuit to multiply the hash key by a mask correction value to produce a new mask correction value, by iteratively processing operand bits starting from a second bit position, wherein the second bit position is represented by one of:
• a least-significant bit and a most-significant bit, and wherein the second bit position is different from the first bit position.

A system, comprising:

• a first multiplier circuit to multiply a mask value by a combination of the input data block and the unmasked result value to produce a mask correction value, by iteratively processing operand bits starting from a first bit position, wherein the first bit position is represented by one of:
• a least-significant bit and a most-significant bit;
• a second multiplier circuit to multiply a masked hash key by a combination of the input data block and the unmasked result value to produce a masked result value, by iteratively processing operand bits starting from a second bit position, wherein the second bit position is represented by one of:
• a least-significant bit and a most-significant bit, and wherein the second bit position is different from the first bit position.