US 2020/0026679 A1 · TRANSACTION ROUTING FOR SYSTEM ON CHIP

Abstract

A system on chip includes an interconnect circuit including at least p input interfaces and at least k output interfaces, p source devices respectively coupled to the p input interfaces and k access ports respectively coupled to the k output interfaces and belonging to a target that includes one or more target devices. Each source device is configured to deliver transactions to the target via one of the access ports. An associated memory of each access port is configured to temporarily store the transactions received by the access port. The target is configured to deliver, for each access port, a fill signal representative of a current fill level of its associated memory. A control circuit is configured to receive the fill signals from the access ports and select the access ports eligible to receive a transaction depending on the current fill levels.

Claims22

Dependent claims

A system on chip, comprising:

an interconnect circuit including at least p input interfaces and at least k output interfaces, where p is greater than k;
p source devices respectively coupled to the p input interfaces;
k access ports respectively coupled to the k output interfaces and belonging to a target that includes one or more target devices, wherein each access port includes an associated memory;
and
a control circuit;
wherein each source device is configured to deliver transactions to the target via one of the access ports;
wherein the associated memory of each access port is configured to temporarily store the transactions received by the access port;
wherein the target is configured to deliver, for each access port, a fill signal representative of a current fill level of its associated memory;
and
wherein the control circuit is configured to receive the fill signals from the access ports and select the access ports eligible to receive a transaction depending on the current fill levels.

7 more elements

A method of operating a system on chip that includes a plurality of source devices and a plurality of access ports belonging to one or more target devices, wherein each access port includes an associated memory, the method comprising:

receiving a plurality of requests to perform transactions to transfer information from the source devices to the access ports;
determining whether each transaction request can be performed based on whether the access port associated with that transaction is eligible to receive information, the determining based on a current fill level of the access port associated with that transaction;
assigning eligible access ports to the source devices depending at least on the current fill levels of the associate memories;
temporarily storing transaction information the associated memory of the access ports determined to be eligible to receive information;
and
updating the current fill level of the associated memory of each access point after inputting or outputting information to or from of that associated memory.

3 more elements

Dependencies are inferred from the claim text.

Transaction routing for system on chip

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Transaction routing for system on chip

Life of this patent

Abstract

Claims22