Apparatus and Method to Provide a Multi-Segment I2C Bus Exerciser/Analyzer/Fault Injector and Debug Port System

A method, comprising:

• providing, by a plurality of device I2C interfaces of a baseboard management controller, respective device I2C buses, each device I2C bus being ported externally to the baseboard management controller;
• connecting each one of the I2C busses to a respective device buffer/switch circuit, each device buffer/switch circuit configured to selectably connect to the respective I2C bus in a high-impedance mode, an open-drain mode, and a FET switch mode;
• connecting each device buffer/switch circuit to a multiplexor/driver circuit, wherein the multiplexor/driver circuit includes a multiplexor I2C interface that provides a multiplexor I2C bus that is ported externally to the baseboard management controller;
• and
• receiving, by the multiplexor/driver circuit, a command to selectively couple one of the device I2C busses to the multiplexor I2C bus, and to select one of the high-impedance mode, the open-drain mode, or the FET switch mode for the selected buffer/switch circuit.

An information handling system, comprising:

• a plurality of devices, each device operably coupled to a respective device I2C bus;
• and
• a baseboard management controller, including:
• a plurality of device I2C interfaces, each device I2C interfaces configured to provide a device I2C bus that is ported externally to the baseboard management controller and coupled to a respective one of the devices;
• a plurality of device buffer/switch circuits, each device buffer/switch circuit being connected to a respective one of the device I2C busses, and configured to selectably connect to the respective I2C bus in a high-impedance mode, an open-drain mode, and a FET switch mode;
• and
• a multiplexor/driver circuit including a multiplexor I2C interface that provides a multiplexor I2C bus that is ported externally to the baseboard management controller, wherein the multiplexor/driver circuit is coupled to each device I2C bus via the respective buffer/switch circuit, and is configured to selectively couple one of the device I2C busses to the multiplexor I2C bus, and to select one of the high-impedance mode, the open-drain mode, or the FET switch mode for the selected buffer/switch circuit.