Circuitry system and method for processing interrupt priority

Abstract

The disclosure is related to a circuitry system and a method for processing interrupt priority. The circuitry system is such as a system-on-chip that operates the method. The high-priority interrupt is configured to be always on and prohibited from accessing a critical section. When a high-priority interrupt occurs as a processor of the system is in operation, the processor sets a low-priority interrupt to access the critical section where the high-priority interrupt accessed previously. When the low-priority interrupt is terminated, the processor determines whether or not to wake up the unfinished task that is previously set for the high-priority interrupt. The processor continues processing the task since the task has not been finished. The circuity system can therefore retain the characteristics of all disabled interrupts and also maintain an instantaneity for the important tasks of the system.

Dependencies are inferred from the claim text.