Memory system and operating method thereof
AssigneeSK hynix Inc.
InventorJoo-Young LEE
Life of this patent
Estimating the term…
Abstract
A memory system includes a memory device including a plurality of dies each including one or more flush blocks and one or more multi-level cell blocks; a controller write buffer; a controller buffer manager configured to buffer host data into the controller rite buffer; a flush block manager configured to control, when a flush command is received, the memory device to perform an interleaved program operation of programming the buffered host data into the flush blocks respectively included in the dies; and a processor configured to control, when a size of the buffered host data reaches a threshold value, the memory device to perform the interleaved program operation of programming the buffered host data into the multi-level cell blocks respectively included in the dies.
Claims20
A memory system comprising:
- a memory device including a plurality of dies, each including one or more flush blocks and one or more multi-level cell blocks;
- a controller write buffer;
- a controller buffer manager configured to buffer host data into the controller write buffer;
- a flush block manager configured to control, when a flush command is received, the memory device to perform an interleaved program operation of programming the buffered host data into the flush blocks respectively included in the dies;
- and
- a processor configured to control, when a size of the buffered host data reaches a threshold value, the memory device to perform the interleaved program operation of programming the buffered host data into the multi-level cell blocks respectively included in the dies.
An operating method of a memory system, the method comprising:
- buffering host data into a controller write buffer;
- performing, when a flush command is received, a first interleaved program operation of programming the buffered host data into a plurality of flush blocks respectively included in a plurality of dies;
- and
- performing, when a size of the buffered host data reaches a threshold value, a second interleaved program operation of programming the buffered host data into a plurality of multi-level cell blocks respectively included in the dies.
Dependencies are inferred from the claim text.