Dynamic update of the number of architected registers assigned to software threads using spill counts

A computer program product to manage operation of a computer system comprising a processor whose architecture specifies a certain number of architected registers, the computer program product comprising:

• a computer readable storage medium having computer readable program code embodied therewith, the computer readable program code comprising:
• computer readable program code configured to assign some of the architected registers to each of a plurality of software threads;
• computer readable program code configured to monitor each of the software threads to determine whether a first number of the architected registers assigned to a first software thread among the software threads is sufficient;
• and
• computer code configured to assign a second number of the architected registers to the first software thread different from the first number when the first number is determined to not be sufficient,
• wherein the computer system comprises a spill counter for each of the software threads, where each spill counter generates a spill count indicating how many times the corresponding software thread causes contents of one of a plurality of physical registers associated with another one of the software threads to be copied to one of a plurality of virtual registers, and
• wherein the first number is determined to not be sufficient based on the spill counts.