Techniques for decoupled access-execute near-memory processing
AssigneeIntel Corporation
InventorsBerkin AKIN, Alaa R. ALAMELDEEN
Life of this patent
Estimating the term…
Abstract
Techniques for decoupled access-execute near-memory processing include examples of first or second circuitry of a near-memory processor receiving instructions that cause the first circuitry to implement system memory access operations to access one or more data chunks and the second circuitry to implement compute operations using the one or more data chunks.
Claims22
An apparatus comprising:
- a first circuitry of a near-memory processor to:
- receive data access instructions to access a system memory, the data access instructions having corresponding compute instructions that were received by a second circuitry of the near-memory processor;
- exchange synchronization information with the second circuitry to store one or more data chunks from the accessed system memory to a local memory at the near-memory processor for the second circuitry to use for one or more compute iterations;
- and
- map data access operations for the first circuitry to access the system memory to obtain the one or more data chunks based on the data access instructions and the exchanged synchronization information.
At least one machine readable medium comprising a plurality of instructions that in response to being executed by a first circuitry of a near-memory processor, cause the first circuitry to:
- receive data access instructions to access a system memory, the data access instructions having corresponding compute instructions received by a second circuitry of the near-memory processor;
- exchange synchronization information with the second circuitry to store one or more data chunks from the accessed system memory to a local memory at the near-memory processor for the second circuitry to use for one or more compute iterations;
- and
- map data access operations for the first circuitry to access the system memory to obtain the one or more data chunks based on the data access instructions and the exchanged synchronization information.
An apparatus comprising:
- a first circuitry of a near-memory processor to:
- receive compute instructions to use one or more data chunks accessed from a system memory in one or more compute iterations, the one or more data chunks accessed and stored to a local memory by a second circuitry of the near-memory processor based on corresponding data access instructions;
- exchange synchronization information with the second circuitry to access the one or more data chunks stored to the local memory for use in the one or more compute iterations;
- and
- map compute operations for the first circuitry to use the one or more data chunks based on the received compute instructions and the exchanged synchronization information.
A near-memory processor comprising:
- an interface to access system memory coupled with the near-memory processor via one or more memory channels;
- a local memory;
- a first circuitry;
- and
- a second circuitry to:
- receive data access instructions to access the system memory that have corresponding compute instructions that were received by the first circuitry;
- exchange synchronization information with the first circuitry to store one or more data chunks from the accessed system memory to the local memory for the first circuitry to use for one or more compute iterations;
- and
- map data access operations for the second circuitry to access the system memory through the interface to obtain the one or more data chunks based on the data access instructions and the exchanged synchronization information.
Dependencies are inferred from the claim text.