High density and fine pitch interconnect structures in an electric test apparatus
AssigneeIntel Corporation
InventorsPooya Tadayon, Mark Bohr, Joe Walczyk
Life of this patent
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Abstract
An electrical-test apparatus is provided, which includes a MEMS array. In an example, the MEMS array comprises a plurality of tester interconnect structures cantilevered from first terminals on a first side of a substrate. The tester interconnect structures may have a first diameter. In an example, the MEMS array comprises a plurality of through-substrate vias that extend through the substrate, the vias having a second diameter larger than the first diameter. In an example, individual ones of the vias electrically couple individual ones of the tester interconnect structures to corresponding ones of second terminals on a second side of the substrate.
Claims20
An electrical-test probe array, comprising:
- a plurality of probes comprising electrically conductive material cantilevered from first terminals on a first side of a substrate at an angle non-normal to a plane of the substrate, individual ones of the probes having a base anchored to one of the first terminals and a contact tip at a free end, opposite the base;
- and
- a plurality of through-substrate vias (TSVs) that extend through the substrate, the TSVs comprising electrically conductive material.
An electrical-test system comprising:
- a probe array comprising a plurality of probes cantilevered from first terminals on a first side of a substrate, wherein the probes have a first diameter and a first pitch, and a plurality of through-substrate vias (TSVs) that extend through the substrate, the TSVs comprising electrically conductive material and having a second diameter, larger than the first diameter, and a second pitch, larger than the first pitch;
- and
- a space transformer comprising a plurality of traces, wherein the traces electrically couple the TSVs to third terminals, the third terminals having a third pitch, greater than the second pitch.
A method, comprising:
- forming a plurality of vias comprising conductive material extending into a substrate;
- forming a plurality of first terminals over a first side of the substrate, wherein individual ones of the vias electrically couple to individual ones of the first terminals;
- forming a mask material over the terminals;
- forming a plurality of openings within the mask material, wherein individual ones of the openings are over corresponding ones of the terminals, and intersect the substrate at an angle non-normal to a plane of the substrate;
- depositing conductive material within the openings to form a corresponding plurality of probes electrically coupled to the vias;
- and
- electrically coupling to individual ones of the vias from a second side of the substrate, opposite the first.
Dependencies are inferred from the claim text.